1. Field of the Invention
The present invention relates generally to semiconductor memory programming methods and, more particularly, to methods for programming multi-level nitride read-only memory cells.
2. Description of Related Art
Non-volatile semiconductor memory devices are designed to maintain programmed information even in the absence of electrical power. Non-volatile memories in common use today include read-only memories (ROMs) that typically are programmed to store a fixed bit pattern at the time of manufacture and that subsequently can not be reprogrammed. Programmable read-only memories (PROMs) are a form of field-programmable memory devices that can be programmed once by a PROM programmer. Erasable programmable read-only memories (EPROMs) are programmable like PROMs, but can also be erased, for example, by exposure to ultraviolet light that places all bits in the memory to a known state (e.g., a logic 1). Electrically erasable programmable read-only memories (EEPROMs) are similar to EPROMs except that individual stored bits may be erased electrically. A particular form of EEPROMs, known as flash memories, typically is erased in blocks although flash memory cells can be programmed individually.
Nitride read-only memory (NROM) devices represent a relatively recent development in non-volatile memory technology. (The acronym “NROM” is a part of a combination trademark of Saifun Semiconductors Ltd. of Netanya, Israel.) These devices store information in the form of localized trapped charges. Some NROM devices are capable of storing multiple bits per cell. According to a typical implementation, charge can be stored in two regions of a nitride layer that forms part of a typical NROM cell. Further, a multiple-bit NROM cell may be formed of a single transistor, leading to densities of NROM arrays that are higher than those achieved by many other forms of non-volatile memories.
A non-volatile memory device, for example, an NROM cell, normally is programmed by applying a programming pulse to terminals of the device. The programming pulse has the effect of injecting charge into a charge-trapping layer of the NROM device, thereby modifying a threshold voltage, Vt. Some NROM devices have two data regions in the charge-trapping layer that are able to store independent data values by modifying the Vt in a localized area near a source or drain of an NROM cell. When the Vt is able to take on two distinguishable values, then each data region is capable of storing one bit of information.
Some coupling inevitably may exist between two regions in an NROM cell. As a result, programming one data region can have an effect on the programming of the other data region in the same cell, a phenomenon that has been referred to as a second bit effect. The second bit effect can act to reduce the utility of NROM device architectures.
A need thus exists in the prior art to provide a method of programming NROM cells that may mitigate the effect of the undesirable second bit effect.